Arithmatic Instructions

Arithmetic instructions in assembly language perform basic mathematical operations like addition, subtraction, multiplication, and division. These instructions operate on registers, memory locations, or immediate values.

1) ADD: Add

General form: ADD destination, source

This instruction adds a number from source to destination. The result is available in destination.

· The source may be an immediate number, a register or a memory location.

· The destination may be a register or a memory location.

· Both source and destination cannot be memory locations.

· The size of source and destination must be same i.e. both must be bytes or both must be words.

·       Segment registers cannot be used.

·       Flags Affected: CF, PF, AF, ZF, SF, OF

Examples:

ADD AL, 67H

ADD AX, [SI]

2) ADC: Add with Carry

General form: ADC destination, source

· The operation of this instruction is same as ADD instruction except it adds carry flag bit to the result.

· If CF=1 (set), 1 is added to the addition result.

· If CF=0 (reset), 0 is added to the addition result.

· All condition flags are affected by this instruction.

· Flags Affected: CF, PF, AF, ZF, SF, OF

Examples:

ADC AX, BX

ADC AH, 67H

ADC BX, [SI]

 

3) SUB: Subtract

  SUB destination, source → Subtracts source from destination.

  SBB destination, source → Subtracts source and borrow flag (CF) from destination.

MOV AL, 07H  ; Load AL with 7

SUB AL, 02H  ; AL = AL - 2 → AL = 5

 

4) SBB: Subtract with Borrow

General form: SUB destination, source te number, a register or a memory location. rds. SBB, borrow flag (i.e. Carry flag) and source will be subtracted from destination and result is placed in destination. SUB, only source will be subtracted from destination and result is placed in destination.

destination = destination - source

SUB AX, BX

SUB AH, 67H

SUB BX, [SI]

SUB CX, [5000H]

SUB [BX], 23H

 

5) INC: Increment

General form: INC destination

· This instruction increments the destination by 1.

· The destination may be a register or a memory location.

· Immediate operand is not allowed.

· Flags affected: A, O, P, S and Z. Carry flag is not affected by this instruction.

Examples:

INC BL

INC CX

 

6) DEC: Decrement

General form: DEC destination

· This instruction subtracts 1 from destination.

· The destination may be a register or a memory location.

· Immediate operand cannot be used.

· Flags affected: A, O, P, S and Z. Carry flag is not affected by this instruction.

· Examples:

DEC CL

DEC BP

 

7) CMP: Compare

General form: CMP destination, source

· This instruction compares destination and source.

· Both can be byte operands or both can be word operands.

· The source can be an immediate number, a register or a memory locatin.

· The destination can be a register or a memory location.

· Both operands cannot be memory operands.

· Comparison is done by subtracting the source from destination (destination – source). Source and destination remain unchanged.

All condition flags are affected to indicate the result of operation.

For example,

CMP CX, BX

i) If CX = BX CF = 0, ZF = 1, SF = 0

ii) If CX > BX CF = 0, ZF = 0, SF = 0

iii) If CX < BX CF = 1, ZF = 0, SF = 1

CMP AL, 01H

CMP BH, CL

CMP DX, NUM1

CMP [BX], 10H

 

8) AAA: ASCII Adjust after Addition

General form: AAA

The AAA (ASCII Adjust after Addition) instruction is used in x86 assembly language, particularly for adjusting the result of adding two packed BCD (Binary Coded Decimal) values stored in the AL register. It is part of the x86 family of ASCII and BCD arithmetic instructions.

· This instruction is generally used after an ADD instruction. AH must be cleared before ADD operation.

· This instruction converts the contents of AL to unpacked decimal digits.

· This instruction examines the lower 4 bits of AL whether it contains a value in the range 0 to 9.

· If it is between 0 – 9 and AF=0, this instruction sets 4 higher bits of AL to zero.

· If lower 4 bits of AL are in the range 0 – 9 and AF=1, 06H is added to AL. The upper four bits of AL are cleared and AH is incremented by 1.

· If lower nibble (lower 4 bits) of AL is greater than 9, AL is incremented by 6 and AH is incremented by 1. The upper nibble of AL is cleared and AF=CF=1.

· Flags affected: A, C

Before Execution: The AL register should contain the sum of two ASCII digits (in the range 0x00 to 0x09).

Adjustment Logic:

• If the lower nibble (4 bits) of AL is greater than 9 or if the Auxiliary Carry Flag (AF) is set:
  • Add 0x06 to AL.
  • Increment AH by 1.
  • Set the AF and CF (Carry Flag).
• Otherwise:
  • Clear AF and CF.
• Finally, the upper nibble of AL is cleared to 0.

· Examples:

1) 

MOV AL, '3'    ; AL = 0x33 (ASCII code for '3')

ADD AL, '8'    ; AL = 0x33 + 0x38 = 0x6B (result not a valid ASCII digit)

AAA            ; Adjust AL to 0x01, AH incremented by 1, AL = 0x01

• Before AAA: AL = 0x6B (invalid BCD digit)
• After AAA:
  • AL = 0x01 (low nibble as a valid BCD digit)
  • AH is incremented by 1

Key Points:

• Only works with AL and AH registers.
• Does not support 32-bit or 64-bit operations.
• Mostly obsolete in modern applications, as BCD arithmetic is rarely used.

2) Let BL = 34H

AL = 33H

then

ADD AL, BL ; AL = 33 + 34 = 67H

AAA ; AL = 07H

3) Let BL = 34H

AL = 36H

then

ADD AL, BL ; AL = 33 + 34 = 6AH

AAA ; Since lower 4 bits of AL = A > 9

therefore AL = AL + 06H

= 10H

AL = 00H, AH = 01H

 

9) AAS: ASCII Adjust after Subtraction

The AAS (ASCII Adjust after Subtraction) instruction in x86 assembly language is used to adjust the result of subtracting two ASCII-encoded decimal digits. It ensures that the AL register contains a valid unpacked BCD (Binary Coded Decimal) digit.

General form: AAS

· This instruction corrects the result in AL register. This instruction is used after subtraction operation.

· If lower nibble of AL is greater than 9 or if AF = 1, AL is decremented by 6 and AH is decremented by 1. The CF and AF are set to 1.

 

10) AAM: ASCII Adjust after Multiplication

General form: AAM

· This instruction converts the product available in unpacked BCD format.

· This instruction is used after multiplication operation in which two unpacked BCD operands are multiplied.

· Flags affected: S, Z, P

· Example:

Before Execution: The AL register contains the result of subtracting two ASCII digits (each in the range 0x30 to 0x39, representing '0' to '9').

Adjustment Logic:

1. If the lower nibble of AL is greater than 9 or if the Auxiliary Carry Flag (AF) is set:
   • Subtract 0x06 from AL.
   • Decrement the AH register by 1.
   • Set both the AF and CF (Carry Flag).
2. Otherwise:
   • Clear AF and CF.
3. Finally, the upper nibble of AL is cleared to 0.

When adjustment is needed

Before AAS: AL = 0xFB, AF = 1

After AAS:

• AL = 0x09 (valid BCD digit)
• AH is decremented by 1
• AF and CF are set to 1

MOV AL, '3'    ; AL = 0x33 (ASCII code for '3')

SUB AL, '8'    ; AL = 0x33 - 0x38 = 0xFB (invalid BCD digit)

AAS            ; Adjusts AL to 0x09, decrements AH by 1

MOV AL, '3'    ; AL = 0x33 (ASCII code for '3')

SUB AL, '8'    ; AL = 0x33 - 0x38 = 0xFB (invalid BCD digit)

AAS            ; Adjusts AL to 0x09, decrements AH by 1

MOV AL, '7'    ; AL = 0x37 (ASCII code for '7')
SUB AL, '5'    ; AL = 0x37 - 0x35 = 0x02 (valid BCD digit)
AAS            ; No adjustment needed, AL = 0x02

MOV AL, 04

MOV BL, 09

MUL BL ; AX = 0024H

AAM ; AH = 03, AL = 06

🚨 Important Notes:

• The AAS instruction only works with the AL and AH registers.
• It is intended for BCD arithmetic, which is not commonly used in modern applications.
• Typically used in conjunction with the SUB instruction for ASCII arithmetic.

 

11) AAD: ASCII Adjust before Division

The AAD (ASCII Adjust before Division) instruction in x86 assembly language is used to prepare two unpacked BCD (Binary Coded Decimal) digits in AH and AL registers for a division operation. It converts the unpacked BCD representation into a binary number in the AL register.

General form: AAM

· This instruction converts two unpacked BCD digits in AH and AL to equivalent binary number and stores it in AL.

· Flags modified: S, Z, P

· This instruction is used before DIV instruction.

1. Computes the binary value using the formula:

$$AL = (AH \times 10) + AL$$

2. Clears the AH register (AH = 0).
3. The instruction affects the SF, ZF, and PF flags based on the result in AL, while CF, AF, and OF are undefined.

Example:

MOV AX, 0205h  ; AH = 02, AL = 05 (Represents unpacked BCD 25)

AAD             ; Converts AH and AL to binary

; After AAD:

; AX = 0019h (AL = 25 in binary, AH = 0)

Explanation:

• AL = (02 × 10) + 05 = 25 (0x19)
• AH = 0

Let AX = 0508

AAD ; AL = 3AH

12) DAA: Decimal Adjust Accumulator

General form: DAA

· This instruction is used to convert the result of addition of two packed BCD numbers to a valid BCD numbers.

· The result has to be only in AL.

· If lower nibble of AL is greater than 9 or if AF = 1, it will add 06 to lower nibble in AL.

· After adding 06, if upper nibble of AL is greater than 9 or if CF=1, this instruction adds 60 to AL.

· Flags affected: S, Z, A, P, C

· Following examples explains this instruction.

i) Let AL = 53, CL = 29

DAA ; C > 9

7C + 06 = 82

ii) Let AL = 73, CL = 29

DAA ; C > 9

9C + 06 = A2

A > 9

A2 + 60 = 02 in AL and CF = 1

 

13) DAS: Decimal Adjust after Subtraction

The DAS (Decimal Adjust after Subtraction) instruction in x86 assembly language is used to adjust the result of a subtraction operation involving packed BCD (Binary Coded Decimal) values. It ensures that the result in the AL register is a valid packed BCD digit.

General form: DAS

· This instruction is used after subtracting two packed BCD numbers. The result of subtraction must be in AL.

· If lower nibble of AL > 9 or the AF = 1 then this instruction will subtract 6 from lower nibble of AL.

· If the result in upper nibble is now greater than 9 or if carry flag was set, the instruction will subtract 60 from AL.

When Adjustment is Needed:

• If the lower nibble of AL is greater than 9, or if the Auxiliary Carry Flag (AF) is set:Subtract 0x06 from AL.
• Set the AF flag.
• When the Upper Nibble of AL is Greater than 9 or if the Carry Flag (CF) is Set:Subtract 0x60 from AL.
• Set the CF flag.

Otherwise:

• Clear the AF and CF flags.

· Examples:

MOV AL, 0x45  ; Packed BCD representing 45

SUB AL, 0x28  ; Subtract 28 (AL = 0x1D, not a valid BCD)

DAS           ; Adjust to a valid BCD digit (AL = 0x17)

Explanation:

• Before DAS: AL = 0x1D
• After DAS:
  • AL = 0x17 (valid BCD for 17)
  • AF and CF adjusted accordingly
    
    

1) Let AL = 75, BH = 46

SUB AL, BH ; AL = 75 – 46

= 2F

DAS ; AL = AL - 06

= 2F - 06

= 29

2) Let AL = 49, BH = 72

SUB AL, BH ; AL = 49 - 72

= D7 with CF = 1

Since D > 9

AL = AL - 60

= D7 - 60

= 77 with CF = 1

 

14) NEG: Negate (Find 2’s complement)

General form: NEG destination

· This instruction finds 2’s complement of destination

· For finding 2’s complement, it subtracts the contents of destination from zero.

· The result is stored in destination.

· The destination may be a register or a memory location.

 

15) MUL: Unsigned multiplication of byte or word

General form: MUL source

· This instruction multiplies an unsigned byte by contents of AL or an unsigned word by contents of AX.

· The source can be a register or memory location. Immediate data cannot be used as source.

· When a byte is multiplied by AL, the result is put in AX.

· When a word is multiplied by AX, the result can be as large as 32 bits. The most significant word (upper 16 bits) of result is placed in DX. The least significant word (lower 16 bits) of result is placed in AX.

· If the most significant byte of 16 bit result or the most significant word of 32 bit result is 0, CF and OF will be 0. A, P, S and Z flags are undefined.

· Examples:

MUL BH ; AX = AL * BH

MUL CX ; DX : AX = AX * CX

MUL BYTE PTR [BX]

MUL WORD PTR [SI]

 

16) IMUL: Multiply signed numbers

General form: IMUL source

· This instruction multiplies a signed byte by AL or a signed word by contents of AX.

· The source can be a register or memory location. Immediate data can not be used as source.

· When a byte is multiplied by AL, the signed result is put in AX.

· When a word is multiplied by AX, the signed result is put in registers DX and AX with upper 16 bits in DX and lower 16 bits in AX.

· If upper byte of 16 bit result or upper word of 32 bit result contains only sign bits (all 0s for positive result and all 1s for negative result) then CF = OF = 0 (reset).

· If upper byte of 16 bit result or upper word of 32 bit result contains part of the product, CF = OF = 1 (set).

· A, P, S, Z flags undefined.

Examples:

IMUL BX

IMUL AX

IMUL WORD PTR [SI]

 

17) CBW: Convert signed Byte to signed Word.

The CBW (Convert Byte to Word) instruction in x86 assembly language is used to convert a signed byte in the AL register into a signed word in the AX register by sign-extending it.

General form: CBW

· This instruction copies the sign bit of a byte in AL to all bits in AH.

· No flags are affected.

• Source: AL (8-bit signed byte)
• Destination: AX (16-bit signed word)

The sign extension replicates the sign bit (the most significant bit, MSB) of AL into the upper byte (AH) of AX.

• If the sign bit of AL is 0 (positive or zero), AH is set to 0.
• If the sign bit of AL is 1 (negative), AH is set to 0xFF.

---

18) CWD: Convert signed Word to signed Double word

The CWD (Convert Word to Double Word) instruction in x86 assembly language is used to convert a signed 16-bit word in the AX register into a signed 32-bit double word in the DX:AX register pair by sign-extending it.

General form: CWD

· This instruction copies the sign bit of a word in AX to all bits of DX register.

· No flags are affected.

 

19) DIV: Unsigned Divide

General form: DIV source

· This instruction is used to divide an unsigned word by a byte or an unsigned double word by a word.

· The source can be a register or memory location.

· When a word is divided by byte, the word must be in AX. After division, AL will contain an 8 bit result (quotient) and AH will contain an 8 bit remainder.

· If a number is divided by zero or if result is greater than FFH, 8086 will automatically generate a type 0 interrupt.

· When a double word is divided by a word, the most significant word must be in DX and least significant word must be in AX. After division, AX will contain the 16 bit result and DX will contain 16 bit remainder.

· If a number is divided by 0 or if the result is greater than FFFFH, type 0 interrupt is generated.

· All flags are undefined after a DIV instruction

Examples:

DIV BL ; AX / BL

DIV CX ; DX : AX / CX

DIV BYTE PTR [SI] ; AX / [SI]

 

20) IDIV: Signed division

General form: IDIV source register or memory

· This instruction is used to divide a signed word by a signed byte or a signed double word by a signed word.

· When a signed word is divided by signed byte, the word must be in AX. After division, AL will contain signed result (quotient) and AH will contain signed remainder.

· If a number is divided by zero or if result is greater than 127 or result is less than -127, type 0 interrupt is generated.

· When a signed double word is divided by a signed word, the most significant word must be in DX and least significant word must be in AX. After division, AX will contain the 16 bit result and DX will contain 16 bit remainder.

· If a number is divided by 0, or if the result is greater than 7FFFH, or if the result is less than 8001H, type 0 interrupt is generated.

o All flags are undefined.

Example : 

IDIV BL

IDIV BP

IDIV BYTE PTR[BX]

ADD DX, BX

 

OPCODE	OPERAND	EXPLANATION	EXAMPLE
ADD	D, S	D = D + S	ADD AX, [2050]
ADC	D, S	D = D + S + prev. carry	ADC AX, BX
SUB	D, S	D = D – S	SUB AX, [SI]
SBB	D, S	D = D – S – prev. carry	SBB [2050], 0050
MUL	8-bit register	AX = AL * 8-bit reg.	MUL BH
MUL	16-bit register	DX AX = AX * 16-bit reg.	MUL CX
IMUL	8 or 16 bit register	performs signed multiplication	IMUL CX
DIV	8-bit register	AX = AX / 8-bit reg. ; AL = quotient ; AH = remainder	DIV BL
DIV	16-bit register	DX AX / 16-bit reg. ; AX = quotient ; DX = remainder	DIV CX
IDIV	8 or 16 bit register	performs signed division	IDIV BL
INC	D	D = D + 1	INC AX
DEC	D	D = D – 1	DEC [2050]
CBW	none	converts signed byte to word	CBW
CWD	none	converts signed byte to double word	CWD
NEG	D	D = 2’s compliment of D	NEG AL
DAA	none	decimal adjust accumulator	DAA
DAS	none	decimal adjust accumulator after subtraction	DAS
AAA	none	ASCII adjust accumulator after addition	AAA
AAS	none	ASCII adjust accumulator after subtraction	AAS
AAM	none	ASCII adjust accumulator after multiplication	AAM
AAD	none	ASCII adjust accumulator after division	AAD

 

Opcode	Operand	Explanation	Example
ADD	R	A = A + R	ADD B
ADD	M	A = A + Mc	ADD 2050
ADI	8-bit data	A = A + 8-bit data	ADI 50
ADC	R	A = A + R + prev. carry	ADC B
ADC	M	A = A + Mc + prev. carry	ADC 2050
ACI	8-bit data	A = A + 8-bit data + prev. carry	ACI 50
SUB	R	A = A – R	SUB B
SUB	M	A = A – Mc	SUB 2050
SUI	8-bit data	A = A – 8-bit data	SUI 50
SBB	R	A = A – R – prev. carry	SBB B
SBB	M	A = A – Mc -prev. carry	SBB 2050
SBI	8-bit data	A = A – 8-bit data – prev. carry	SBI 50
INR	R	R = R + 1	INR B
INR	M	M = Mc + 1	INR 2050
INX	r.p.	r.p. = r.p. + 1	INX H
DCR	R	R = R – 1	DCR B
DCR	M	M = Mc – 1	DCR 2050
DCX	r.p.	r.p. = r.p. – 1	DCX H
DAD	r.p.	HL = HL + r.p.	DAD H