Logical instructions

 Logical instructions:

The processor instruction set provides the instructions AND, OR, XOR, TEST, and NOT Boolean logic, which tests, sets, and clears the bits according to the need of the program.

The format for these instructions −

Sr.No.	Instruction	Format
1	AND	AND operand1, operand2
2	OR	OR operand1, operand2
3	XOR	XOR operand1, operand2
4	TEST	TEST operand1, operand2
5	NOT	NOT operand1

 

1) AND: Logical AND

General form: AND destination, source

 This instruction ANDs bits of destination and source. The result is stored in destination.

 The source can be immediate number, a register or memory location.

 The destination can be a register or a memory location.

 Both operands cannot be memory locations.

 The size of operand must be same.

 Flags affected:

 OF = CF = 0 (reset)

 P, S and Z flags are modified.

 A (Auxiliary Carry) flag is undefined.

Examples:

AND AX, 8000H

AND BH, CL

AND DX, [BX]

 

2) OR: Logical OR

General form: OR destination, source

 This instruction performs OR operation on bits of source and destination. The result is stored in destination.

 The source can be immediate number, a register or memory location.

 The destination can be a register or a memory location.

 Both operands cannot be memory locations.

 The size of operand must be same.

 Flags affected:

 OF = CF = 0 (reset)

 P, S and Z flags are modified.

 A (Auxiliary Carry) flag is undefined.

 

Examples:

OR BX, CX

OR AL, DL

OR [BX], AH

OR AL, 30H

 

3) XOR: Logical Exclusive OR

General form: XOR destination, source

 This instruction performs logical exclusive OR operation on bits of source and destination. The result is stored in destination.

 The source can be immediate number, a register or memory location.

 The destination can be a register or a memory location.

 Both operands cannot be memory locations.

 The size of operand must be same.

 Flags affected:

 OF = CF = 0 (reset)

 P, S and Z flags are modified.

 A (Auxiliary Carry) flag is undefined.

 Examples:

XOR AL, BL

XOR CX, DX

XOR BX, 5000H

XOR [SI], FFH

XOR DX, DX

 

4) NOT: Invert each bit of operand

The NOT instruction implements the bitwise NOT operation. NOT operation reverses the bits in an operand. The operand could be either in a register or in the memory.

General form: XOR destination

 This instruction complements the contents of destination.

 The destination can be register or memory location.

 No flags are affected.

 Examples:

NOT BX

NOT BYTE PTR[BX]

NOT WORD PTR[SI]

NOT CL

 

5) TEST: AND operands to update flags.

The TEST instruction works same as the AND operation, but unlike AND instruction, it does not change the first operand. So, if we need to check whether a number in a register is even or odd, we can also do this using the TEST instruction without changing the original number.

General form: TEST destination, source M.A.Ansari Page 13

This instruction logically ANDs the bits of source and destination.

No operand will change, only flags are updated.

Flags affected:

OF = CF = 0 (reset)

P, S and Z flags are modified.

A (Auxiliary Carry) flag is undefined

Examples:

TEST AX, BX

TEST [0500H], 06H

TEST AL, CL