Tuesday, 4 March 2025

Arithmatic Instructions

Arithmetic instructions in assembly language perform basic mathematical operations like addition, subtraction, multiplication, and division. These instructions operate on registers, memory locations, or immediate values.

1. Addition (ADD)

The ADD instruction adds the source operand to the destination operand.

  • Syntax: ADD destination, source
  • Operation: destination = destination + source

  • The source may be an immediate number, a register or a memory location.
  • The destination may be a register or a memory location.
  • Both source and destination cannot be memory locations.
  • The size of source and destination must be same i.e. both must be bytes or both must be words.
  • Segment registers cannot be used.
  • Flags Affected: CF, PF, AF, ZF, SF, OF

Example:

MOV AX, 5    ; Load 5 into AX

MOV BX, 10   ; Load 10 into BX

ADD AX, BX   ; AX = AX + BX (AX = 15)


2. ADC: Add with Carry

The ADC (Add with Carry) instruction adds the source operand, the destination operand, and the carry flag (CF). This is particularly useful in multi-byte or multi-word arithmetic operations where a carry might need to be propagated.

The ADC instruction adds two operands and the carry flag.

  • Syntax: ADC destination, source
  • Operation: destination = destination + source + Carry

  • destination: The operand where the result will be stored.
  • source: The value to be added to the destination along with the carry flag.
  • The carry flag (CF) is added along with the source and destination.
  • The CF is set if there is an overflow from the addition, which is useful in multi-precision arithmetic.
Affected Flags
  • CF (Carry Flag): Set if there is a carry out of the most significant bit,  If CF=1 is added to the addition result. If CF=0 (reset), 0 is added to the addition result.
  • ZF (Zero Flag): Set if the result is zero.
  • SF (Sign Flag): Set if the result is negative.
  • OF (Overflow Flag): Set if there is a signed overflow.
  • PF (Parity Flag): Set if the number of set bits in the result is even.
  • AF (Auxiliary Carry Flag): Set if there is a carry from the lower nibble.
  • The operation of this instruction is same as ADD instruction except it adds carry flag bit to the result.
  • All condition flags are affected by this instruction.
1)
ADC AX, BX

ADC AH, 67H

ADC BX, [SI]

2)

MOV AX, 5

MOV BX, 10

STC           ; Set Carry Flag

ADC AX, BX   ; AX = 5 + 10 + 1 (AX = 16)

3. Subtraction (SUB)

The SUB instruction subtracts the source operand from the destination operand.

  • Syntax: SUB destination, source
  • Operation: destination = destination - source

Example: 

MOV AX, 20   ; Load 20 into AX

MOV BX, 5    ; Load 5 into BX

SUB AX, BX   ; AX = AX - BX (AX = 15)

4. SBB: Subtract with Borrow

  • The SBB instruction subtracts the source and the carry flag from the destination.

    • Syntax: SBB destination, source
    • Operation: destination = destination - source - Carry

    Example:

    MOV AX, 20

    MOV BX, 5

    STC           ; Set Carry Flag

    SBB AX, BX   ; AX = 20 - 5 - 1 (AX = 14)

This is useful for multi-word or multi-byte arithmetic where a borrow might need to propagate.

Affected Flags

  • CF (Carry Flag): Set if there is a borrow from the operation.
  • ZF (Zero Flag): Set if the result is zero.
  • SF (Sign Flag): Set if the result is negative.
  • OF (Overflow Flag): Set if signed overflow occurs.
  • PF (Parity Flag): Set if the number of set bits in the result is even.
  • AF (Auxiliary Carry Flag): Set if there is a borrow from the lower nibble.

5. MUL Multiplication - MUL is used for unsigned multiplication.

  • Syntax (MUL): MUL source
  • Operation: AX = AL * source (for 8-bit) or DX:AX = AX * source (for 16-bit)
source: The operand that will be multiplied with the accumulator (AL, AX, or EAX). It can be a register or a memory operand.

MUL reg/mem8

The MUL instruction performs different operations depending on the size of the operand:
  • Operands: AL * source → AX
  • The result is stored in the AX register (16-bit).

    16-bit Multiplication:

    MUL reg/mem16

  • Affected Flags
    • CF (Carry Flag) and OF (Overflow Flag) are set if the upper half of the result is not zero.
    • ZF (Zero Flag), SF (Sign Flag), and PF (Parity Flag) are undefined.

    Example:

    MOV AL, 10   ; Load 10 into AL (8-bit register)

    MOV BL, 2    ; Load 2 into BL

    MUL BL       ; AL = AL * BL (AL = 20)

    6. IMUL

    • IMUL is used for signed multiplication.
    Example:

    MOV AX, -4

    MOV BX, 5

    IMUL BX      ; AX = AX * BX (AX = -20)


    7. DIV Division

    • DIV is used for unsigned division.

    • Syntax (DIV): DIV divisor
    • Operation: AX = DX:AX / divisor, Remainder in DX

    Example:

    MOV AX, 20   ; Dividend

    MOV BL, 5    ; Divisor

    DIV BL       ; AX = AX / BL (AX = 4, remainder in AH)

    8. IDIV 

    • IDIV is used for signed division.

    • Syntax (IDIV): DIV divisor
    • Operation: AX = DX:AX / divisor, Remainder in DX

    MOV AX, -20

    MOV BX, 5

    IDIV BX      ; AX = AX / BX (AX = -4)


    9. Increment (INC)

    The INC instruction increases the value of the operand by 1.

    • Syntax: INC destination
    • Operation: destination = destination + 1

    Example:

    MOV AX, 9

    INC AX       ; AX = 10


    10. Decrement (DEC)

    The DEC instruction decreases the value of the operand by 1.

    • Syntax: DEC destination
    • Operation: destination = destination - 1

    Example:

    MOV AX, 10

    DEC AX       ; AX = 9


    11. Negation (NEG)

    The NEG instruction changes the sign of the operand (Two’s complement).

    • Syntax: NEG destination
    • Operation: destination = -destination

    Example:

    MOV AX, 5

    NEG AX       ; AX = -5


    12. Comparison (CMP)

    The CMP instruction compares two operands by performing a subtraction that affects the flags, but it does not store the result.

    • Syntax: CMP destination, source
    • Operation: destination - source (sets flags only)

    Example:

    MOV AX, 10

    MOV BX, 20

    CMP AX, BX   ; Sets flags for conditional jumps (e.g., below, equal)

    JG LABEL ; Jump if greater (for signed values)

  • CMP is vital for implementing conditional logic in assembly.
  • It works closely with conditional jump instructions (JE, JNE, JG, JL, etc.).
  • Helps in loops, conditional execution, and decision-making in low-level programming.
  • Affected Flags:

    • ZF (Zero Flag): Set if the result is 0.
    • SF (Sign Flag): Set if the result is negative.
    • CF (Carry Flag): Set if there is a borrow (for unsigned comparisons).
    • OF (Overflow Flag): Set if there is signed overflow.
    • PF (Parity Flag): Set if the result has an even number of set bits.

    Conditions

    CF

    ZF

    SF

    If AX = BX

    0

    1

    0

    If AX > BX

    0

    0

    0

    If AX < BX

    1

    0

    1


    13. Sign Extension (CBW, CWD, CDQ)

    Sign extension is used to convert signed integers of smaller sizes to larger sizes while preserving the sign of the number. This is crucial in signed arithmetic operations to avoid incorrect results.

    • CBW (Convert Byte to Word): Sign-extends AL to AX.
    CBW converts the signed byte in the AL register to a signed word in the AX register by sign-extending the 8th bit (sign bit).
    The CBW (Convert Byte to Word) instruction in x86 assembly language is used to convert a signed byte in the AL register into a signed word in the AX register by sign-extending it.

    Syntax:

    CBW ; Sign-extend AL to AX

    Operation:

    • If the MSB (Most Significant Bit) of AL is 0, AH is set to 0.
    • If the MSB of AL is 1, AH is set to FFh (for a negative sign in two's complement).

    Example:

    MOV AL, -5 ; AL = 0xFB (in 2's complement, -5) CBW ; Sign-extend AL to AX ; Result: AX = 0xFFFB
    • Before: AL = 0xFB (-5 in signed 8-bit)
    • After: AX = 0xFFFB (-5 in signed 16-bit)
    • CWD (Convert Word to Double Word): Sign-extends AX to DX:AX.

    Description:

    • CWD sign-extends the signed 16-bit value in AX to a 32-bit signed value in DX:AX.
    • DX will contain the sign extension of AX.
    The CWD (Convert Word to Double Word) instruction in x86 assembly language is used to convert a signed 16-bit word in the AX register into a signed 32-bit double word in the DX:AX register pair by sign-extending it.

    · This instruction copies the sign bit of a word in AX to all bits of DX register.

    · No flags are affected.

    Syntax:

    CWD ; Sign-extend AX to DX:AX

    Operation:

    • If AX is positive or zero, DX is set to 0x0000.
    • If AX is negative, DX is set to 0xFFFF.

    Example:

    MOV AX, -123 ; AX = 0xFF85 (in 2's complement, -123) CWD ; Sign-extend AX to DX:AX ; Result: DX = 0xFFFF, AX = 0xFF85
    • Before: AX = 0xFF85 (-123 in signed 16-bit)
    • After: DX:AX = 0xFFFF:0xFF85
    • CDQ (Convert Double Word to Quad Word): Sign-extends EAX to EDX:EAX.

    Description:

    • CDQ sign-extends a signed 32-bit value in EAX to a 64-bit signed value in EDX:EAX.
    • EDX will contain the sign extension of EAX.

    Syntax:

    CDQ ; Sign-extend EAX to EDX:EAX

    Operation:

    • If EAX is positive or zero, EDX is set to 0x00000000.
    • If EAX is negative, EDX is set to 0xFFFFFFFF.

    Example:

    MOV EAX, -100000 ; EAX = 0xFFFE7960 (in 2's complement, -100000) CDQ ; Sign-extend EAX to EDX:EAX ; Result: EDX = 0xFFFFFFFF, EAX = 0xFFFE7960
    • Before: EAX = 0xFFFE7960 (-100000 in signed 32-bit)
    • After: EDX:EAX = 0xFFFFFFFF:0xFFFE7960

    Practical Use Cases -
    Arithmetic Operations: Before performing signed division using IDIV, sign extension is needed to set up the dividend correctly.

    MOV AX, -50
    MOV BX, 7
    CWD          ; Prepare for signed division (DX:AX)
    IDIV BX      ; AX = Quotient, DX = Remainder

    Multiplication:
    When dealing with sign extension for multi-precision arithmetic.

    Data Conversion:
    When promoting data types in low-level programming, such as in system programming or embedded systems.

    Instruction

    Input

    Sign-Extended Output

    CBW

    AL

    AX

    CWD

    AX

    DX:AX

    CDQ

    EAX

    EDX:EAX

    CQO

    RAX

    RDX:RAX


    Conclusion

    Sign extension instructions (CBW, CWD, CDQ, CQO) are essential for ensuring signed numbers maintain their correct value when their size increases. They are particularly useful in signed arithmetic operations and when working with mixed operand sizes.

    14. Decimal Adjust (DAA, DAS, AAA, AAS)

    These instructions are used for adjusting the result of arithmetic operations on packed BCD (Binary Coded Decimal) numbers. The DAA instruction ensures that the result is a valid BCD

    • DAA (Decimal Adjust after Addition)
    Corrects the result of an ADD or ADC (Add with Carry) instruction when operating on packed BCD numbers.

    ·        BCD Numbers: Each byte represents two decimal digits (0-9) in binary form.

    ·        After Addition: The addition might produce an invalid BCD (e.g., 0xA or higher in a nibble).

    ·        DAA Adjustment: The DAA instruction corrects this by adding 6 to the lower or upper nibble if needed.

    • It examines the AL register (the accumulator).
    • If the lower nibble (4 bits) of AL is greater than 9 or the Auxiliary Carry Flag (AF) is set, it adds 6 to AL.
    • If the upper nibble of AL is greater than 9 or the Carry Flag (CF) is set, it adds 60h to AL.
    • It updates the AF and CF flags
    Use Case: Adding two packed BCD numbers.
    Example
    MOV AL, 09H
    ADD AL,07H
    DAA

    MOV AL, 0x27 ; BCD for 27 
    ADD AL, 0x35 ; Add BCD for 35 (27 + 35 = 62 in decimal) 
    DAA                ; Adjust AL to be a valid BCD (0x62) ; 
    AL now contains 0x62 (which is a valid BCD for 62)
    • No operands needed.
    • The adjustment is based on the AL register and the state of the AF (Auxiliary Flag) and CF (Carry Flag).

    ⚙️ Operation:

    1. If the lower nibble (AL & 0x0F) > 9 or AF is set, AL += 0x06, and AF is set.
    2. If the upper nibble (AL > 0x9F) or CF is set, AL += 0x60, and CF is set.

    • DAS (Decimal Adjust after Subtraction)

    The DAS (Decimal Adjust AL Before) instruction is used to adjust AL after performing a subtraction on BCD numbers.

    • When to use: After performing a subtraction between two BCD numbers, the result in AL might not be a valid BCD number. DAS adjusts the result in AL to ensure it is a valid BCD number.

    • How it works

    • BCD Numbers: Each nibble (4 bits) in the AL register represents a decimal digit (0-9).
    • Adjustment Logic:
      • If the lower nibble (AL & 0x0F) is greater than 9 or the Auxiliary Carry Flag (AF) is set, 6 is subtracted from AL.
      • If the upper nibble (AL & 0xF0) is greater than 9 or the Carry Flag (CF) is set, 0x60 is subtracted from AL.

    Example:

    MOV AL, 0x15     ; AL = 15 (BCD for decimal 15)
    SUB AL, 0x06     ; AL = 0x0F (15 - 6 = 9)
    DAS              ; Decimal adjust AL

    ; After DAS:
    ; AL = 0x09 (Valid BCD representation of 9)

    Handling Decimal Borrow
    MOV AL, 0x12     ; AL = 12 (BCD for decimal 12)
    SUB AL, 0x08     ; AL = 0x0A (12 - 8 = 4)
    DAS              ; Adjust AL to valid BCD

    ; AL = 0x04 (Valid BCD representation of 4)

    Affected Flags:

    • CF (Carry Flag): Set if there is a decimal borrow.
    • AF (Auxiliary Flag): Undefined after execution.
    • ZF, SF, PF: The Zero, Sign, and Parity flags are affected according to the result.
    • OF (Overflow Flag): Undefined.

    • AAA (ASCII Adjust after Addition)

    The AAA (ASCII Adjust AL After) instruction is used when dealing with ASCII values that represent decimal digits. It adjusts the AL register to ensure it holds a valid ASCII value after performing arithmetic on ASCII characters.

    • When to use: After adding or subtracting ASCII decimal digits (i.e., the values in AL and other registers are in the ASCII form of decimal digits), AAA adjusts AL to hold a valid ASCII decimal digit.

    • How it works: It adjusts the value in AL so that it is a valid ASCII-encoded decimal digit, typically by adding 0x30 to convert the number into the correct ASCII range.

    • The AAA instruction converts the binary result of the addition into a valid BCD value by:

      1. Checking the Lower Nibble:

        • If the lower nibble (AL & 0x0F) is greater than 9, or if the AF (Auxiliary Carry Flag) is set:
          • 6 is added to AL.
          • AH is incremented by 1.
          • AF and CF (Carry Flag) are set.
      2. Otherwise:

        • The lower nibble of AL is cleared (sets the upper nibble to 0).
        • AF and CF are cleared.
    Example:
    MOV AL, 5      ; AL = 0x35 (ASCII for '5')
    ADD AL, 4      ; AL = 0x39 (0x35 + 0x34 = 0x69)
    AAA              ; Adjust AL to valid BCD

    ; After AAA:
    ; AL = 0x09 (Valid BCD for 9)
    ; AH = 0x01 (For the carry, result = 0x10 + 0x09 = 19 in decimal)

    Key Points:

    • Only works with AL and AH registers.
    • Does not support 32-bit or 64-bit operations.
    • Mostly obsolete in modern applications, as BCD arithmetic is rarely used.

    • AAS (ASCII Adjust after Subtraction)

    The AAS (ASCII Adjust AL Before) instruction is used when subtracting ASCII-encoded decimal digits from AL. It adjusts the result in AL to ensure it is a valid ASCII value after subtraction.

    • When to use: After subtracting ASCII decimal digits (i.e., AL holds an ASCII character representing a decimal digit), AAS adjusts the AL register to ensure the result is a valid ASCII decimal digit.

    • How it works: AAS will adjust the value in AL to make sure the result is a valid ASCII representation of a decimal number.

    • The AAS instruction converts the binary result of the subtraction into a valid BCD value by:

      1. Checking the Lower Nibble:

        • If the lower nibble (AL & 0x0F) is greater than 9, or if the AF (Auxiliary Carry Flag) is set:
          • 6 is subtracted from AL.
          • AH is decremented by 1.
          • AF and CF (Carry Flag) are set.
      2. Otherwise:

        • The upper nibble of AL is cleared (sets AL to a decimal digit).
        • AF and CF are cleared.
    • Affected Flags:
      • CF (Carry Flag): Set if there is a decimal borrow.
      • AF (Auxiliary Flag): Set if an adjustment is needed.
      • ZF, SF, PF, OF: Not affected.

    Example:

    MOV AL, '9'      ; AL = 0x39 (ASCII for '9')

    SUB AL, '4'      ; AL = 0x35 (0x39 - 0x34 = 0x05)

    AAS              ; Decimal adjust AL

    ; After AAS:

    ; AL = 0x05 (Valid BCD for 5)

    ; AH remains unchanged

    Example:

    MOV AL, 0x09

    ADD AL, 0x07  ; AL = 0x10

    DAA           ; Adjusts AL for BCD (AL = 0x16)

    • DAA: Used after BCD addition to adjust AL to a valid BCD value.
    • DAS: Used after BCD subtraction to adjust AL to a valid BCD value.
    • AAA: Used after ASCII addition to adjust AL to a valid ASCII decimal value.
    • AAS: Used after ASCII subtraction to adjust AL to a valid ASCII decimal value.

    These instructions are particularly useful in handling BCD and ASCII arithmetic, where each digit is represented by a separate byte, and the values must remain valid during and after arithmetic operations.


    Flag Affected by Arithmetic Instructions

    Most arithmetic instructions affect the following flags:

    • CF (Carry Flag): Set if there is a carry out of the most significant bit.
    • ZF (Zero Flag): Set if the result is zero.
    • SF (Sign Flag): Set if the result is negative.
    • OF (Overflow Flag): Set if signed overflow occurs.
    • PF (Parity Flag): Set if the number of 1 bits in the result is even.
    • AF (Auxiliary Carry Flag): Set if there is a carry from the lower nibble.

    Use Cases of Arithmetic Instructions

    • Simple Calculations: Performing arithmetic operations in low-level embedded systems.
    • Address Calculations: Useful in array indexing and pointer arithmetic.
    • Flag Setting for Branching: Combining arithmetic and conditional jumps.
    • Multiprecision Arithmetic: Using ADC and SBB for operations on large numbers.

    Conclusion

    Arithmetic instructions in assembly language provide powerful, low-level control over numerical operations. These instructions are essential for mathematical computations, logic processing, and manipulating data at the hardware level. Understanding these instructions is critical for systems programming, developing embedded systems, and optimizing performance-critical code.

    OPCODE

    OPERAND

    EXPLANATION

    EXAMPLE

    ADD

    D, S

    D = D + S

    ADD AX, [2050]

    ADC

    D, S

    D = D + S + prev. carry

    ADC AX, BX

    SUB

    D, S

    D = D – S

    SUB AX, [SI]

    SBB

    D, S

    D = D – S – prev. carry

    SBB [2050], 0050

    MUL

    8-bit register

    AX = AL * 8-bit reg.

    MUL BH

    MUL

    16-bit register

    DX AX = AX * 16-bit reg.

    MUL CX

    IMUL

    8 or 16 bit register

    performs signed multiplication

    IMUL CX

    DIV

    8-bit register

    AX = AX / 8-bit reg. ; AL = quotient ; AH = remainder

    DIV BL

    DIV

    16-bit register

    DX AX / 16-bit reg. ; AX = quotient ; DX = remainder

    DIV CX

    IDIV

    8 or 16 bit register

    performs signed division

    IDIV BL

    INC

    D

    D = D + 1

    INC AX

    DEC

    D

    D = D – 1

    DEC [2050]

    CBW

    none

    converts signed byte to word

    CBW

    CWD

    none

    converts signed byte to double word

    CWD

    NEG

    D

    D = 2’s compliment of D

    NEG AL

    DAA

    none

    decimal adjust accumulator

    DAA

    DAS

    none

    decimal adjust accumulator after subtraction

    DAS

    AAA

    none

    ASCII adjust accumulator after addition

    AAA

    AAS

    none

    ASCII adjust accumulator after subtraction

    AAS

    AAM

    none

    ASCII adjust accumulator after multiplication

    AAM

    AAD

    none

    ASCII adjust accumulator after division

    AAD

     

    Opcode

    Operand

    Explanation

    Example

    ADD

    R

    A = A + R

    ADD B

    ADD

    M

    A = A + Mc

    ADD 2050

    ADI

    8-bit data

    A = A + 8-bit data

    ADI 50

    ADC

    R

    A = A + R + prev. carry

    ADC B

    ADC

    M

    A = A + Mc + prev. carry

    ADC 2050

    ACI

    8-bit data

    A = A + 8-bit data + prev. carry

    ACI 50

    SUB

    R

    A = A – R

    SUB B

    SUB

    M

    A = A – Mc

    SUB 2050

    SUI

    8-bit data

    A = A – 8-bit data

    SUI 50

    SBB

    R

    A = A – R – prev. carry

    SBB B

    SBB

    M

    A = A – Mc -prev. carry

    SBB 2050

    SBI

    8-bit data

    A = A – 8-bit data – prev. carry

    SBI 50

    INR

    R

    R = R + 1

    INR B

    INR

    M

    M = Mc + 1

    INR 2050

    INX

    r.p.

    r.p. = r.p. + 1

    INX H

    DCR

    R

    R = R – 1

    DCR B

    DCR

    M

    M = Mc – 1

    DCR 2050

    DCX

    r.p.

    r.p. = r.p. – 1

    DCX H

    DAD

    r.p.

    HL = HL + r.p.

    DAD H

     


     

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